v1.7.1 Release

SystemVerilog Simulation,
Simplified.

A high-performance 4-state RTL simulator with native VPI/cocotb integration. Free for everyone.

Get Started View Features
curl -fsSL https://ryusim.seiraiyu.com/install.sh | bash

Linux only. Windows users: use WSL2.

Feature Highlights

4-State Simulation

Full X/Z propagation with IEEE 1800-2023 compliant synthesizable SystemVerilog subset.

VPI / cocotb Native

First-class VPI interface. Write testbenches in Python with cocotb. V1 is a VPI-only simulator by design.

Code Coverage

Built-in line, branch, and toggle coverage. LCOV output compatible with standard analysis tools.